Título Por
Catedra
1

pdf 0. Introduccion.pdf

879 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

2

pdf 11. Design for Test.pdf

295 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

3

pdf 10. Low Power Design.pdf

211 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

4

pdf 9. Test Benches and Verification.pdf

459 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

5

pdf 8. Finite state machines.pdf

187 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

6

pdf 6. Design with verilog.pdf

498 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

7

pdf 7. Hierarchy and partitioning.pdf

243 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

8

pdf 5. How to design complex digital systems.pdf

1011 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

9

pdf 4. Introduction to Design with Verilog.pdf

692 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

10

pdf 3. Diseño CMOS.pdf

626 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

11

pdf 2. Timing design in digital systems.pdf

876 kb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

12

pdf 1. IC Design Introduction.pdf

4.1 mb

Víctor Grimblatt H.

25 Oct 201125/10/112011-10-25

Tareas
1

pdf Tarea1.pdf

642 kb

Víctor Grimblatt H.

2 Nov 201102/11/112011-11-02

Varios
1

zip synopsys_dc.setup.zip

585 b

Víctor Grimblatt H.

2 Nov 201102/11/112011-11-02

2

pdf High Level Simulation.pdf

6 mb

Víctor Grimblatt H.

2 Nov 201102/11/112011-11-02

3

pdf Conectarse al Servidor.pdf

354 kb

Víctor Grimblatt H.

2 Nov 201102/11/112011-11-02